Discussion:
PD computer
(too old to reply)
muta...@gmail.com
2023-04-03 09:06:04 UTC
Permalink
There is a new proposal from Jean-Marc who used to post here:

https://cod5.com/citizen-computer.html

It requires me to switch from x86 to MIPS as that it is the only
PD processor that we know of.

But PDOS-generic doesn't care about that.

The PD tools I am using may need to change though.
At least the assembler.

I do need a pseudo-BIOS for pdos-generic to run under,
and I am wondering how many lines of code that would be.

I'm also wondering whether I can simply buy a laptop with
that FPGA in it instead of constructing a desktop.

I'm thinking of a completely dead laptop.

Doesn't even have a functioning processor.

So you need to first load the FPGA and then you need
to load the BIOS and then you need to load the OS.

I don't know if that is technically possible.

Even the S360/67 had a processor.

But that's all. After that it relied on the intelligent
peripherals (card reader) or you could manipulate
switches on the console.

Note - I know virtually nothing about FPGAs.

BFN. Paul.
Dan Cross
2023-04-03 14:41:53 UTC
Permalink
Post by ***@gmail.com
https://cod5.com/citizen-computer.html
It requires me to switch from x86 to MIPS as that it is the only
PD processor that we know of.
You appear to be referring to a particular implementation of
MIPS on an FPGA. However, the MIPS instruction set architecture
itself is not in the public domain:
https://www.mips.com/license/mips-open-architecture-license-agreement-ver-1-0-agreement/
Post by ***@gmail.com
But PDOS-generic doesn't care about that.
The PD tools I am using may need to change though.
At least the assembler.
I do need a pseudo-BIOS for pdos-generic to run under,
and I am wondering how many lines of code that would be.
Lots.
Post by ***@gmail.com
I'm also wondering whether I can simply buy a laptop with
that FPGA in it instead of constructing a desktop.
I'm thinking of a completely dead laptop.
Doesn't even have a functioning processor.
That would almost certainly not work. A laptop mainboard is
designed around a particular CPU; one cannot just swap out
another CPU of a different architecture and expect it to work.
For example, given an x86-based laptop, LPC peripherals designed
for programmed IO would need some bridge mechanism to work with
MIPS, which does not have programmed IO instructions.
Post by ***@gmail.com
So you need to first load the FPGA and then you need
to load the BIOS and then you need to load the OS.
I don't know if that is technically possible.
Even the S360/67 had a processor.
In this case, the FPGA implements a "soft core" CPU.
Post by ***@gmail.com
But that's all. After that it relied on the intelligent
peripherals (card reader) or you could manipulate
switches on the console.
Note - I know virtually nothing about FPGAs.
Yes.

Perhaps reading up on computer architecture would be useful.

- Dan C.
muta...@gmail.com
2023-04-03 15:37:21 UTC
Permalink
Post by Dan Cross
Post by ***@gmail.com
https://cod5.com/citizen-computer.html
It requires me to switch from x86 to MIPS as that it is the only
PD processor that we know of.
You appear to be referring to a particular implementation of
MIPS on an FPGA. However, the MIPS instruction set architecture
https://www.mips.com/license/mips-open-architecture-license-agreement-ver-1-0-agreement/
THIS AGREEMENT CONSTITUTES A BINDING CONTRACT ON YOU AND GOVERNS YOUR USE OF THE MIPS OPEN DELIVERABLES.

I'm not using "mips open deliverables".

Copyright covers some artistic work, which their
deliverables will be, but I don't think they can copyright
the instructions themselves. That's more like a list of
names.

They could patent them though if there was something
novel about them. But any relevant patents expired long
ago. That Plasma project deliberately avoided including
some instructions because at the time there were still
some applicable patents.
Post by Dan Cross
Post by ***@gmail.com
But PDOS-generic doesn't care about that.
The PD tools I am using may need to change though.
At least the assembler.
I do need a pseudo-BIOS for pdos-generic to run under,
and I am wondering how many lines of code that would be.
Lots.
Note that we will be using PS/2 for the keyboard to
avoid needing a USB stack.

Jean-Marc has higher goals, but I'm only trying to get
to a lower goal of getting a C compiler working.

And after that a serial port to access the outside world.

I've written a serial port driver before, for the 8086.
It wasn't a lot of code.
Post by Dan Cross
Post by ***@gmail.com
I'm also wondering whether I can simply buy a laptop with
that FPGA in it instead of constructing a desktop.
I'm thinking of a completely dead laptop.
Doesn't even have a functioning processor.
That would almost certainly not work. A laptop mainboard is
designed around a particular CPU; one cannot just swap out
another CPU of a different architecture and expect it to work.
For example, given an x86-based laptop, LPC peripherals designed
for programmed IO would need some bridge mechanism to work with
MIPS, which does not have programmed IO instructions.
Can e.g. the serial port be dual-driven by either a memory
write or an IO to cover both?

Or just split FPGA laptops into two broad categories?
Post by Dan Cross
Perhaps reading up on computer architecture would be useful.
I tend to do that in small chunks.

Which means I occasionally I ask dumb questions like "in
Hercules, if I define the CPU as S/370 but the memory as
say 200 MB, is the memory actually 'there'?".

How are you going to handle DAT?

What's DAT?

And S/380 was born.

BFN. Paul.
wolfgang kern
2023-04-03 16:10:14 UTC
Permalink
On 03/04/2023 17:37, ***@gmail.com wrote:
...
Post by ***@gmail.com
I've written a serial port driver before, for the 8086.
It wasn't a lot of code.
which pins of the 8086 CPU did you use to become RS232 ?

I programmed Intel 8251A chips which I added to my Z80 set 1979.

...
Post by ***@gmail.com
Can e.g. the serial port be dual-driven by either a memory
write or an IO to cover both?
sure possible, but why both ?
and be aware that serial ports have more than one address.

...
Post by ***@gmail.com
Post by Dan Cross
Perhaps reading up on computer architecture would be useful.
YES, you should read at least a few CPU-manuals.
__
wolfgang
muta...@gmail.com
2023-04-03 16:22:57 UTC
Permalink
Post by wolfgang kern
...
Post by ***@gmail.com
I've written a serial port driver before, for the 8086.
It wasn't a lot of code.
which pins of the 8086 CPU did you use to become RS232 ?
It's still for an 8086, even if it drives a UART.

C:\devel\pdcomm>grep Int 'pdcommd*'
pdcommd.c: /* Interrupts 0-7 use the PIC at 20H, whilst interrupts 8-15 use
pdcommd.c: uartDisableInts(&pdcomm->uart);
pdcommd.c: pdcommdaInstallInt((long)pdcomm->vector * 4);
pdcommd.c: /* switch of Interrupts */
pdcommd.c: uartDisableInts(&pdcomm->uart);
pdcommd.c: /* pdcommInt is the interrupt handler */
pdcommd.c: void DOSPREF pdcommInt(void)
pdcommd.c: id = uartGetIntType(&pdcomm->uart);
pdcommd.c: uartDisableInts(&pdcomm->uart);
pdcommd.c: id = uartGetIntType(&pdcomm->uart);
pdcommda.asm: pdcommInt equ _pdcommInt
pdcommda.asm: pdcommdaInt equ _pdcommdaInt
pdcommda.asm: pdcommdaInstallInt equ _pdcommdaInstallInt
pdcommda.asm: extrn pdcommInt: far
pdcommda.asm: extrn pdcommInt: near
pdcommda.asm: extrn pdcommInt: proc
pdcommda.asm: public pdcommdaInt, pdcommdaInstallInt
pdcommda.asm: pdcommdaInt proc
pdcommda.asm: call pdcommInt ;Note Could be small stack
pdcommda.asm: pdcommdaInt endp
pdcommda.asm: pdcommdaInstallInt proc, address: dword
pdcommda.asm: mov word ptr[bx+2],seg pdcommdaInt
pdcommda.asm: mov word ptr[bx],offset pdcommdaInt
pdcommda.asm: pdcommdaInstallInt endp
pdcommda.h: void DOSPREF pdcommdaInstallInt(long address);

C:\devel\pdcomm>
Post by wolfgang kern
Post by ***@gmail.com
Can e.g. the serial port be dual-driven by either a memory
write or an IO to cover both?
sure possible, but why both ?
So that you can make a laptop that can have either
sort of CPU put onto the FPGA that is inside the laptop.
Post by wolfgang kern
and be aware that serial ports have more than one address.
Ok, I'm not sure what is required or whether a single dead
laptop is possible.

BFN. Paul.
muta...@gmail.com
2023-04-03 16:36:46 UTC
Permalink
Post by ***@gmail.com
I've written a serial port driver before, for the 8086.
It wasn't a lot of code.
And a correction.
pdcommda.asm: mov word ptr[bx+2],seg pdcommdaInt
pdcommda.asm: mov word ptr[bx],offset pdcommdaInt
The assembler portion appears to have been written by
Matthew Parker, not me.

I'm not very good with assembler.

BFN. Paul.
Dan Cross
2023-04-03 18:09:28 UTC
Permalink
Post by wolfgang kern
...
Post by ***@gmail.com
I've written a serial port driver before, for the 8086.
It wasn't a lot of code.
which pins of the 8086 CPU did you use to become RS232 ?
I programmed Intel 8251A chips which I added to my Z80 set 1979.
I'm sure he meant that he wrote a driver for an 8250-compatible
UART that used programmed IO on something 8086 A/D-bus
compatible.

- Dan C.
Dan Cross
2023-04-03 18:07:28 UTC
Permalink
Post by ***@gmail.com
Post by Dan Cross
Post by ***@gmail.com
https://cod5.com/citizen-computer.html
It requires me to switch from x86 to MIPS as that it is the only
PD processor that we know of.
You appear to be referring to a particular implementation of
MIPS on an FPGA. However, the MIPS instruction set architecture
https://www.mips.com/license/mips-open-architecture-license-agreement-ver-1-0-agreement/
THIS AGREEMENT CONSTITUTES A BINDING CONTRACT ON YOU AND GOVERNS YOUR USE OF THE MIPS OPEN DELIVERABLES.
I'm not using "mips open deliverables".
I'd re-read that if I were you. Note that they refer to the
_instruction set architecture_. You seem to be confused about
what precisely this citizen computer thing is actually referring
to: that is an implementation of a MIPS soft-core on an FPGA.
That's quite different from the ISA being in the public domain,
though.
Post by ***@gmail.com
Copyright covers some artistic work, which their
deliverables will be, but I don't think they can copyright
the instructions themselves. That's more like a list of
names.
They could patent them though if there was something
novel about them. But any relevant patents expired long
ago. That Plasma project deliberately avoided including
some instructions because at the time there were still
some applicable patents.
There's a lot more to the CPU than _just_ the instruction
mnemonics: memory and IO architectures, how interrupts work,
how encodings and a whole lot more.

Anyway, the point here is that the MIPS is not a "PD
processor." Be careful with how you describe it,
especially as MIPS is particularly litigious.
Post by ***@gmail.com
Post by Dan Cross
Post by ***@gmail.com
But PDOS-generic doesn't care about that.
The PD tools I am using may need to change though.
At least the assembler.
I do need a pseudo-BIOS for pdos-generic to run under,
and I am wondering how many lines of code that would be.
Lots.
Note that we will be using PS/2 for the keyboard to
avoid needing a USB stack.
Doesn't matter. That's only a small part of what you'd have to
write, and the impedence mismatch is large.

Also note that on a lot of laptops, you don't actually have a
physical PS/2 keyboard controller. Rather, you have an emulator
that's implements a soft-PS/2 controller in proprietary code
that runs in SMM mode, but that is actually talking to a USB
keyboard on your behalf. If you yank the x86 CPU, you also lose
SMM mode (which is x86-specific) and you lose that capability.
Post by ***@gmail.com
Jean-Marc has higher goals, but I'm only trying to get
to a lower goal of getting a C compiler working.
And after that a serial port to access the outside world.
I've written a serial port driver before, for the 8086.
It wasn't a lot of code.
That's only one of many things you'd have to write, and it's
relatively easy by comparison to many of the others.
Post by ***@gmail.com
Post by Dan Cross
Post by ***@gmail.com
I'm also wondering whether I can simply buy a laptop with
that FPGA in it instead of constructing a desktop.
I'm thinking of a completely dead laptop.
Doesn't even have a functioning processor.
That would almost certainly not work. A laptop mainboard is
designed around a particular CPU; one cannot just swap out
another CPU of a different architecture and expect it to work.
For example, given an x86-based laptop, LPC peripherals designed
for programmed IO would need some bridge mechanism to work with
MIPS, which does not have programmed IO instructions.
Can e.g. the serial port be dual-driven by either a memory
write or an IO to cover both?
Possibly, but it depends very much on the specific UART. Often,
these are embedded in the platform chipset, but you'll have to
know a lot about _that_ to make it all work. Very often you'd
have to fiddle with the platform's control apparatus in order to
configure the UART to respond to either MMIO accesses or legacy
IO accesses before doing either; usually the firmware does this
for you (and these days sometimes provides a BIOS emulation
layer). Doing this successfully requires a lot of experience
and patience.
Post by ***@gmail.com
Or just split FPGA laptops into two broad categories?
Trying to rip a central component out of a tightly-integrated,
highly vertical system and replacing it with a completely
different component without significant re-design is just not
viable.
Post by ***@gmail.com
Post by Dan Cross
Perhaps reading up on computer architecture would be useful.
I tend to do that in small chunks.
Which means I occasionally I ask dumb questions like "in
Hercules, if I define the CPU as S/370 but the memory as
say 200 MB, is the memory actually 'there'?".
How are you going to handle DAT?
What's DAT?
And S/380 was born.
This is a very different animal.

- Dan C.
muta...@gmail.com
2023-04-04 00:04:12 UTC
Permalink
Post by ***@gmail.com
I'm not using "mips open deliverables".
I'd re-read that if I were you. Note that they refer to the
_instruction set architecture_. You seem to be confused about
what precisely this citizen computer thing is actually referring
to: that is an implementation of a MIPS soft-core on an FPGA.
That's quite different from the ISA being in the public domain,
though.
Again - copyright covers a work of art. Not an
architectural concept. Patents could cover the later.
But 20 years have passed.
Post by ***@gmail.com
Copyright covers some artistic work, which their
deliverables will be, but I don't think they can copyright
the instructions themselves. That's more like a list of
names.
They could patent them though if there was something
novel about them. But any relevant patents expired long
ago. That Plasma project deliberately avoided including
some instructions because at the time there were still
some applicable patents.
There's a lot more to the CPU than _just_ the instruction
mnemonics: memory and IO architectures, how interrupts work,
how encodings and a whole lot more.
That's not a work of art covered by copyright.
Anyway, the point here is that the MIPS is not a "PD
processor." Be careful with how you describe it,
especially as MIPS is particularly litigious.
I didn't say that "MIPS is a PD processor", if that even
has a meaning.

What I said is that the VHDL produced by the Plasma project
has been released to the public domain.

So we have a public domain CPU available. In my
understanding of the law, the MIPS company can't
stop me taking that VHDL to a manufacturer and
getting chips produced, and selling them.

That by itself wouldn't avoid patents though.

But the 20 year wait has avoided patents.

I may not be able to call it MIPS either, as that is a
trademark. But that's a different issue from both
copyright and patent. And I don't care about having to
rename it. It's a subset anyway (the unaligned access
instructions don't exist - but I don't care about that
either).
Post by ***@gmail.com
Post by Dan Cross
Post by ***@gmail.com
But PDOS-generic doesn't care about that.
The PD tools I am using may need to change though.
At least the assembler.
I do need a pseudo-BIOS for pdos-generic to run under,
and I am wondering how many lines of code that would be.
Lots.
Note that we will be using PS/2 for the keyboard to
avoid needing a USB stack.
Doesn't matter. That's only a small part of what you'd have to
write, and the impedence mismatch is large.
What impedence mismatch?
Also note that on a lot of laptops, you don't actually have a
physical PS/2 keyboard controller. Rather, you have an emulator
that's implements a soft-PS/2 controller in proprietary code
that runs in SMM mode, but that is actually talking to a USB
keyboard on your behalf. If you yank the x86 CPU, you also lose
SMM mode (which is x86-specific) and you lose that capability.
I think you have misunderstood what I asked for.

I'm not talking about getting an existing laptop and swapping
out the CPU.

I'm talking about creating a new laptop based around a
specific FPGA. Presumably high priced, and only of
interest to hobbyists.

With that proposal on the website I need to assemble my
own desktop.

I'd prefer to buy an expensive (within reason) laptop.
Post by ***@gmail.com
Jean-Marc has higher goals, but I'm only trying to get
to a lower goal of getting a C compiler working.
And after that a serial port to access the outside world.
I've written a serial port driver before, for the 8086.
It wasn't a lot of code.
That's only one of many things you'd have to write, and it's
relatively easy by comparison to many of the others.
Could you give me say the 3 most difficult things to
write for the proposed desktop?
Post by ***@gmail.com
Post by Dan Cross
Post by ***@gmail.com
I'm also wondering whether I can simply buy a laptop with
that FPGA in it instead of constructing a desktop.
I'm thinking of a completely dead laptop.
Doesn't even have a functioning processor.
That would almost certainly not work. A laptop mainboard is
designed around a particular CPU; one cannot just swap out
another CPU of a different architecture and expect it to work.
For example, given an x86-based laptop, LPC peripherals designed
for programmed IO would need some bridge mechanism to work with
MIPS, which does not have programmed IO instructions.
Can e.g. the serial port be dual-driven by either a memory
write or an IO to cover both?
Possibly, but it depends very much on the specific UART. Often,
these are embedded in the platform chipset, but you'll have to
know a lot about _that_ to make it all work. Very often you'd
have to fiddle with the platform's control apparatus in order to
configure the UART to respond to either MMIO accesses or legacy
IO accesses before doing either; usually the firmware does this
for you (and these days sometimes provides a BIOS emulation
layer). Doing this successfully requires a lot of experience
and patience.
Ok, so the proposed laptop could be built, and cover both
memory-mapped I/O and "legacy IO".

If it's a once-off software cost, that's fine. I'm more trying
to get a flexible laptop than avoid code.
Post by ***@gmail.com
Or just split FPGA laptops into two broad categories?
Trying to rip a central component out of a tightly-integrated,
highly vertical system and replacing it with a completely
different component without significant re-design is just not
viable.
The proposal was for a NEW tightly-integrated system.

TWO new systems in fact. In laptop form.

Pre-made.

If one is insufficient because of MMIO vs legacy.

But it sounds like one is (probably) sufficient in
conjunction with code.

BFN. Paul.
Dan Cross
2023-04-04 01:18:56 UTC
Permalink
Post by ***@gmail.com
Post by ***@gmail.com
I'm not using "mips open deliverables".
I'd re-read that if I were you. Note that they refer to the
_instruction set architecture_. You seem to be confused about
what precisely this citizen computer thing is actually referring
to: that is an implementation of a MIPS soft-core on an FPGA.
That's quite different from the ISA being in the public domain,
though.
Again - copyright covers a work of art. Not an
architectural concept. Patents could cover the later.
But 20 years have passed.
You should probably take a law course focusing on intellectual
property before assuming that.
Post by ***@gmail.com
I didn't say that "MIPS is a PD processor", if that even
has a meaning.
What I said is that the VHDL produced by the Plasma project
has been released to the public domain.
So we have a public domain CPU available. In my
understanding of the law, the MIPS company can't
stop me taking that VHDL to a manufacturer and
getting chips produced, and selling them.
You should really take a couple of law courses, or better yet
consult with a qualified attorney, before making assumptions
here, _particularly_ regarding MIPS.
Post by ***@gmail.com
That by itself wouldn't avoid patents though.
But the 20 year wait has avoided patents.
Invest some time learning about the actual laws here, instead
of naively making assumptions.
Post by ***@gmail.com
Post by ***@gmail.com
Note that we will be using PS/2 for the keyboard to
avoid needing a USB stack.
Doesn't matter. That's only a small part of what you'd have to
write, and the impedence mismatch is large.
What impedence mismatch?
Look it up.
Post by ***@gmail.com
Also note that on a lot of laptops, you don't actually have a
physical PS/2 keyboard controller. Rather, you have an emulator
that's implements a soft-PS/2 controller in proprietary code
that runs in SMM mode, but that is actually talking to a USB
keyboard on your behalf. If you yank the x86 CPU, you also lose
SMM mode (which is x86-specific) and you lose that capability.
I think you have misunderstood what I asked for.
You seem to be acting as if one could simply slap together some
"laptop" components with an FPGA as a processor and have a
laptop, but that's not how those kinds of systems are built.

At a minimum, you'd have to design and fabricate a mainboard
in a laptop form-factor, ensuring that it could accommodate your
soft CPU/FPGA.
Post by ***@gmail.com
I'm not talking about getting an existing laptop and swapping
out the CPU.
I'm talking about creating a new laptop based around a
specific FPGA. Presumably high priced, and only of
interest to hobbyists.
With that proposal on the website I need to assemble my
own desktop.
I'd prefer to buy an expensive (within reason) laptop.
Such a thing doesn't exist. The closest thing is probably the
MNT Reform, which uses an ARM CPU. A system based on this FPGA
soft-core would have to be designed and built by a competent
engineer (and more likely by more than one such engineer).
Post by ***@gmail.com
Post by ***@gmail.com
Jean-Marc has higher goals, but I'm only trying to get
to a lower goal of getting a C compiler working.
And after that a serial port to access the outside world.
I've written a serial port driver before, for the 8086.
It wasn't a lot of code.
That's only one of many things you'd have to write, and it's
relatively easy by comparison to many of the others.
Could you give me say the 3 most difficult things to
write for the proposed desktop?
Probably initializing the memory and cache controllers, then
DRAM training, and then IO topology initialization. Of course,
all of this is after loading an an initial bootstrap and before
the CPU is even out of reset.
Post by ***@gmail.com
Possibly, but it depends very much on the specific UART. Often,
these are embedded in the platform chipset, but you'll have to
know a lot about _that_ to make it all work. Very often you'd
have to fiddle with the platform's control apparatus in order to
configure the UART to respond to either MMIO accesses or legacy
IO accesses before doing either; usually the firmware does this
for you (and these days sometimes provides a BIOS emulation
layer). Doing this successfully requires a lot of experience
and patience.
Ok, so the proposed laptop could be built, and cover both
memory-mapped I/O and "legacy IO".
That would be a silly design if your intent is to work with a
CPU that doesn't even have programmed IO instructions, let alone
the sort of external bus cycles required for PIO to work.
Post by ***@gmail.com
If it's a once-off software cost, that's fine. I'm more trying
to get a flexible laptop than avoid code.
This is not how one does that.
Post by ***@gmail.com
Post by ***@gmail.com
Or just split FPGA laptops into two broad categories?
Trying to rip a central component out of a tightly-integrated,
highly vertical system and replacing it with a completely
different component without significant re-design is just not
viable.
The proposal was for a NEW tightly-integrated system.
This requires the capacity for absorbing quite a bit of
electrical and computer engineering knowledge, not to mention
electronics experience, to make it happen.
Post by ***@gmail.com
TWO new systems in fact. In laptop form.
Pre-made.
If one is insufficient because of MMIO vs legacy.
But it sounds like one is (probably) sufficient in
conjunction with code.
These statements, in themselves, betray a lack of understanding
of the complexity involved.

What you want doesn't exist, and you have to actually have a lot
of real knowledge to build such a thing. Building a laptop
style system around an FPGA is non-trivial; certainly not the
type of thing a hobbyist with no domain knowledge is up to.

- Dan C.
muta...@gmail.com
2023-04-04 02:20:54 UTC
Permalink
Post by Dan Cross
Post by ***@gmail.com
Again - copyright covers a work of art. Not an
architectural concept. Patents could cover the later.
But 20 years have passed.
You should probably take a law course focusing on intellectual
property before assuming that.
I'm not "assuming" anything. It's my understanding.

At the end of the day, even a judgement from every judge
on the planet is insufficient evidence, because a new
judge can appear, or an existing judge can change his mind.
Post by Dan Cross
Post by ***@gmail.com
So we have a public domain CPU available. In my
understanding of the law, the MIPS company can't
stop me taking that VHDL to a manufacturer and
getting chips produced, and selling them.
You should really take a couple of law courses, or better yet
consult with a qualified attorney, before making assumptions
here, _particularly_ regarding MIPS.
Or I can save my money and see if you can present the
opinion of a qualified attorney and/or court judgements.

Even if you do do that, that's just one lawyer and judge's
opinion.

I'll look at the specific law they are citing in a specific
country to see what they're talking about.

In addition, I found this:

https://en.wikipedia.org/wiki/Loongson

In 2007, a deal was reached by MIPS Technologies and ICT. STMicroelectronics bought a MIPS license for Loongson, and thus the processor can be promoted as MIPS-based or MIPS-compatible instead of MIPS-like.

So it appears that this bridge has already been crossed,
and you just need to market as MIPS-like and they can't
do anything about it.

I don't even need to go that far.

I'm happy to market it as ZZZZYY3Z-like.
Post by Dan Cross
Post by ***@gmail.com
That by itself wouldn't avoid patents though.
But the 20 year wait has avoided patents.
Invest some time learning about the actual laws here, instead
of naively making assumptions.
I am doing that right now, and didn't notice any laws
supporting any counter-argument, so my understanding
remains.
Post by Dan Cross
Post by ***@gmail.com
I think you have misunderstood what I asked for.
You seem to be acting as if one could simply slap together some
"laptop" components with an FPGA as a processor and have a
laptop, but that's not how those kinds of systems are built.
No, I didn't assume that at all.

I just asked for someone to manufacture the laptop I want.

I don't care if 500 engineers are involved.
Post by Dan Cross
Post by ***@gmail.com
I'd prefer to buy an expensive (within reason) laptop.
Such a thing doesn't exist. The closest thing is probably the
MNT Reform, which uses an ARM CPU. A system based on this FPGA
soft-core would have to be designed and built by a competent
engineer (and more likely by more than one such engineer).
Ok, thanks for the reference.
Post by Dan Cross
Post by ***@gmail.com
Could you give me say the 3 most difficult things to
write for the proposed desktop?
Probably initializing the memory and cache controllers, then
DRAM training, and then IO topology initialization. Of course,
all of this is after loading an an initial bootstrap and before
the CPU is even out of reset.
Ok, thanks.
Post by Dan Cross
Post by ***@gmail.com
Ok, so the proposed laptop could be built, and cover both
memory-mapped I/O and "legacy IO".
That would be a silly design if your intent is to work with a
CPU that doesn't even have programmed IO instructions, let alone
the sort of external bus cycles required for PIO to work.
The intent is to allow the user to zap either CPU type
onto the FPGA.
Post by Dan Cross
What you want doesn't exist, and you have to actually have a lot
of real knowledge to build such a thing. Building a laptop
style system around an FPGA is non-trivial; certainly not the
type of thing a hobbyist with no domain knowledge is up to.
I'm not sure where you got the idea I intended to
build it myself. The whole purpose of buying a
pre-made laptop is so that I don't have to build
it myself.

I do want to change the CPU though.

Without opening the case.

But if it doesn't exist, so be it. I was just saying what I'd
like to buy.

BFN. Paul.
wolfgang kern
2023-04-04 05:43:00 UTC
Permalink
Post by ***@gmail.com
Post by Dan Cross
Post by ***@gmail.com
Again - copyright covers a work of art. Not an
architectural concept. Patents could cover the later.
But 20 years have passed.
You should probably take a law course focusing on intellectual
property before assuming that.
I'm not "assuming" anything. It's my understanding.
you think that CPU-instructions can't be patented ?
They are part of real hardware and not just an architectural concept.

while old stuff runs out of patent with time, there are many new x86-64
opcodes like AVX/SIMD and friends that could be still protected.
__
wolfgang
muta...@gmail.com
2023-04-04 07:37:55 UTC
Permalink
Post by wolfgang kern
Post by ***@gmail.com
Post by Dan Cross
Post by ***@gmail.com
Again - copyright covers a work of art. Not an
architectural concept. Patents could cover the later.
But 20 years have passed.
You should probably take a law course focusing on intellectual
property before assuming that.
I'm not "assuming" anything. It's my understanding.
you think that CPU-instructions can't be patented ?
Read what is written above.

I said they can't be copyrighted, not that they can't be patented.

I said it multiple times too.

And I even specified the time that the patents expire in.

And I even said that that time had passed already.
Post by wolfgang kern
They are part of real hardware and not just an architectural concept.
Yes, and people don't write "copyright MIPS" on real hardware.
Or real cars. They're not works of art.
Post by wolfgang kern
while old stuff runs out of patent with time, there are many new x86-64
opcodes like AVX/SIMD and friends that could be still protected.
And I didn't make any claim about those.

I made a claim that:

1. Plasma deliberately avoided using known patented instructions
at the time it was written.

2. Even if they stuffed up, 20 years have passed.

So it cannot be subjected to either patent or copyright,
and is public domain.

Unless someone wants to show me very strong evidence
to the contrary.

So far no-one has. Just suggestions on wasting my money on
lawyers instead of theirs.

BFN. Paul.
muta...@gmail.com
2023-04-04 07:44:33 UTC
Permalink
BTW, there is another computer, not a laptop, and not
the CPU I want (especially being 8-bit), but it's apparently
a buyable computer with an FPGA which is along the road
to what I am after:

https://shop.trenz-electronic.de/en/TE0765-03-S001-MEGA65-highly-advanced-C64-and-C65-compatible-8-bit-computer

BFN. Paul.
Dan Cross
2023-04-04 11:20:00 UTC
Permalink
Post by ***@gmail.com
Post by Dan Cross
Post by ***@gmail.com
Again - copyright covers a work of art. Not an
architectural concept. Patents could cover the later.
But 20 years have passed.
You should probably take a law course focusing on intellectual
property before assuming that.
I'm not "assuming" anything. It's my understanding.
[snip]
Or I can save my money and see if you can present the
opinion of a qualified attorney and/or court judgements.
Even if you do do that, that's just one lawyer and judge's
opinion.
Meh. Your legal opinion seems about as mature as your technical
opinions.
Post by ***@gmail.com
[snip]
Post by Dan Cross
Post by ***@gmail.com
Ok, so the proposed laptop could be built, and cover both
memory-mapped I/O and "legacy IO".
That would be a silly design if your intent is to work with a
CPU that doesn't even have programmed IO instructions, let alone
the sort of external bus cycles required for PIO to work.
The intent is to allow the user to zap either CPU type
onto the FPGA.
Now you're back to the original problem of trying to shoehorn a
MIPS core into a system designed around an x86 core, or the
inverse, which is what I already told you was problematic.
Post by ***@gmail.com
Post by Dan Cross
What you want doesn't exist, and you have to actually have a lot
of real knowledge to build such a thing. Building a laptop
style system around an FPGA is non-trivial; certainly not the
type of thing a hobbyist with no domain knowledge is up to.
I'm not sure where you got the idea I intended to
build it myself. The whole purpose of buying a
pre-made laptop is so that I don't have to build
it myself.
Meh. What you're asking for does not exist and those that are
capable of building such a thing aren't interested in doing so,
so it's all moot.

- Dan C.
muta...@gmail.com
2023-04-04 11:39:36 UTC
Permalink
Post by Dan Cross
Post by ***@gmail.com
Post by Dan Cross
Post by ***@gmail.com
Ok, so the proposed laptop could be built, and cover both
memory-mapped I/O and "legacy IO".
That would be a silly design if your intent is to work with a
CPU that doesn't even have programmed IO instructions, let alone
the sort of external bus cycles required for PIO to work.
The intent is to allow the user to zap either CPU type
onto the FPGA.
Now you're back to the original problem of trying to shoehorn a
MIPS core into a system designed around an x86 core, or the
inverse, which is what I already told you was problematic.
That *is* the solution to the original problem. A serial
port that can be driven by either MMIO or legacy IO.

It's not a silly design. It allows flexibility of CPU loading
onto the FPGA.
Post by Dan Cross
Post by ***@gmail.com
Post by Dan Cross
What you want doesn't exist, and you have to actually have a lot
of real knowledge to build such a thing. Building a laptop
style system around an FPGA is non-trivial; certainly not the
type of thing a hobbyist with no domain knowledge is up to.
I'm not sure where you got the idea I intended to
build it myself. The whole purpose of buying a
pre-made laptop is so that I don't have to build
it myself.
Meh. What you're asking for does not exist and those that are
capable of building such a thing aren't interested in doing so,
so it's all moot.
Sure. That's basically my question.

I was just asking if a laptop that I wanted already existed,
and if it didn't, could it be built.

I'm not sure how many hobbyists are interested in loading
any CPU they want onto the same laptop.

But regardless, if supporting firmware needs to be written,
and that is difficult, it's a doubly moot point.

None of this appears to be viable, but I'm still waiting
for feedback.

I think the best thing is to continue on with the 80386,
as was being done before this proposal. And to a lesser
extent, PdAndro.

Thanks for all the technical info.

BFN. Paul.
Dan Cross
2023-04-04 12:11:02 UTC
Permalink
Post by ***@gmail.com
Post by Dan Cross
Post by ***@gmail.com
Post by Dan Cross
Post by ***@gmail.com
Ok, so the proposed laptop could be built, and cover both
memory-mapped I/O and "legacy IO".
That would be a silly design if your intent is to work with a
CPU that doesn't even have programmed IO instructions, let alone
the sort of external bus cycles required for PIO to work.
The intent is to allow the user to zap either CPU type
onto the FPGA.
Now you're back to the original problem of trying to shoehorn a
MIPS core into a system designed around an x86 core, or the
inverse, which is what I already told you was problematic.
That *is* the solution to the original problem. A serial
port that can be driven by either MMIO or legacy IO.
It's not a silly design. It allows flexibility of CPU loading
onto the FPGA.
[snip]
You don't seem to be aware that an x86 CPU can also use MMIO for
a serial port, provided that serial port supports MMIO already.
So if you have a UART that already supports MMIO, you don't
_need_ the legacy port-IO based support. If you're already
modifying a hobbyist OS to support MMIO access to the serial
port for, say, a MIPS-like CPU core, then you can just use that
same support code on x86 as well.

But more generally you seem to think that the only thing that is
important are driving simple devices like a UART, but there is a
lot more that goes into a modern computer, particularly a device
in the laptop class. Perhaps if you took some time to learn
something about computer architecture this would make a little
more sense to you.

- Dan C.
muta...@gmail.com
2023-04-05 03:45:20 UTC
Permalink
Post by Dan Cross
Post by ***@gmail.com
Post by Dan Cross
Post by ***@gmail.com
Post by Dan Cross
Post by ***@gmail.com
Ok, so the proposed laptop could be built, and cover both
memory-mapped I/O and "legacy IO".
That would be a silly design if your intent is to work with a
CPU that doesn't even have programmed IO instructions, let alone
the sort of external bus cycles required for PIO to work.
The intent is to allow the user to zap either CPU type
onto the FPGA.
Now you're back to the original problem of trying to shoehorn a
MIPS core into a system designed around an x86 core, or the
inverse, which is what I already told you was problematic.
That *is* the solution to the original problem. A serial
port that can be driven by either MMIO or legacy IO.
It's not a silly design. It allows flexibility of CPU loading
onto the FPGA.
[snip]
You don't seem to be aware that an x86 CPU can also use MMIO for
a serial port, provided that serial port supports MMIO already.
So if you have a UART that already supports MMIO, you don't
_need_ the legacy port-IO based support. If you're already
modifying a hobbyist OS to support MMIO access to the serial
port for, say, a MIPS-like CPU core, then you can just use that
same support code on x86 as well.
I think we might be talking cross-purposes.

I am talking about a general-purpose laptop (which
apparently hasn't been built, but may be possible to
be built).

General purpose meaning I can flash any CPU I want
on it. Or at a minimum, Plasma and 80836:

https://opencores.org/projects/zet86

I would like to own such a laptop, even though I don't
have an immediate use for such a machine. So that
if I want to run a S/370 (or modified version) in 10
years from now, the machine is ready, I can "just"
start working on the VHDL (or hire someone to do that).

If I flash an 80386 onto the FPGA, then I expect my
existing 80386 code to work, which uses the "out"
instruction.

I don't expect to be told "sorry, your laptop serial port
only supports mmio so you need to rewrite any software
that uses the 'out' instruction".
Post by Dan Cross
But more generally you seem to think that the only thing that is
important are driving simple devices like a UART, but there is a
lot more that goes into a modern computer, particularly a device
in the laptop class. Perhaps if you took some time to learn
something about computer architecture this would make a little
more sense to you.
I didn't say that I wanted a modern computer.

That's why I want to drive a serial port in the first place.

Other devices I want to drive are a hard disk, and I'm
willing to do that over serial port too. If there are other
options, that don't require too much coding, I'm interested
in them as an alternative, but at the end of the day, I'm
happy to drive the keyboard, terminal, modem and hard
disk over serial ports (which I already know how to drive
using "out" instructions).

Yes, I know it will be slow.

It was also slow when I used a Commodore 64 with
a floppy disk on serial port.

I survived.

BFN. Paul.
wolfgang kern
2023-04-05 05:57:34 UTC
Permalink
Post by ***@gmail.com
Post by ***@gmail.com
The intent is to allow the user to zap either CPU type
onto the FPGA.
possible, but not even CPUs from one producer share:
pin count, pin-layout, BUS-width controls and timing.
so they need also different BUS connections (impedance).

more worse for different manufacturers:
IRQ polarity and behavior(might use soft or hard ACK)
RESET condition (where and how to start code fetch)
and a few more ...
Post by ***@gmail.com
I am talking about a general-purpose laptop (which
apparently hasn't been built, but may be possible to
be built).
General purpose meaning I can flash any CPU I want
https://opencores.org/projects/zet86
good luck, hope you know how to use a solder-iron :)
Post by ***@gmail.com
I would like to own such a laptop, even though I don't
have an immediate use for such a machine. So that
if I want to run a S/370 (or modified version) in 10
years from now, the machine is ready, I can "just"
start working on the VHDL (or hire someone to do that).
you could buy an FPGA evaluation kit, I once (1999) tried one to see if
my idea for a then new CPU style (the "famous" ALT.OS CPU) would work.
It worked, but AMD had a similar idea and penetrated the market before I
even finished documentation for my gadget.
Post by ***@gmail.com
If I flash an 80386 onto the FPGA, then I expect my
existing 80386 code to work, which uses the "out"
instruction.
...
Post by ***@gmail.com
I didn't say that I wanted a modern computer.
That's why I want to drive a serial port in the first place.
Other devices I want to drive are a hard disk, and I'm
willing to do that over serial port too.
OMG, that's how little Paul think hardware can be treated :)
give every pin on all your devices a UART ...
Post by ***@gmail.com
If there are other
options, that don't require too much coding, I'm interested
in them as an alternative, but at the end of the day, I'm
happy to drive the keyboard, terminal, modem and hard
disk over serial ports (which I already know how to drive
using "out" instructions).
none of these devices except modems can be controlled by serial ports.
Post by ***@gmail.com
Yes, I know it will be slow.
It was also slow when I used a Commodore 64 with
a floppy disk on serial port.
C-64 had its very own communication hardware, quite different to PCs.
__
wolfgang
muta...@gmail.com
2023-04-05 08:09:57 UTC
Permalink
Post by wolfgang kern
Post by ***@gmail.com
Post by ***@gmail.com
The intent is to allow the user to zap either CPU type
onto the FPGA.
pin count, pin-layout, BUS-width controls and timing.
so they need also different BUS connections (impedance).
IRQ polarity and behavior(might use soft or hard ACK)
RESET condition (where and how to start code fetch)
and a few more ...
Surely at the electrical layer it depends on the FPGA
and has no relation to what voltages a real 80386
used in 1986?
Post by wolfgang kern
Post by ***@gmail.com
https://opencores.org/projects/zet86
good luck, hope you know how to use a solder-iron :)
No, which is why I wanted to buy a pre-built laptop.
Post by wolfgang kern
Post by ***@gmail.com
If I flash an 80386 onto the FPGA, then I expect my
existing 80386 code to work, which uses the "out"
instruction.
...
Post by ***@gmail.com
I didn't say that I wanted a modern computer.
That's why I want to drive a serial port in the first place.
Other devices I want to drive are a hard disk, and I'm
willing to do that over serial port too.
OMG, that's how little Paul think hardware can be treated :)
give every pin on all your devices a UART ...
Post by ***@gmail.com
If there are other
options, that don't require too much coding, I'm interested
in them as an alternative, but at the end of the day, I'm
happy to drive the keyboard, terminal, modem and hard
disk over serial ports (which I already know how to drive
using "out" instructions).
none of these devices except modems can be controlled by serial ports.
Not true.

I connect the serial port to wifi using RS232-wifi or whatever
it is called, and that connects to another computer
running Windows or whatever (with my custom software)
which provides the hard disk capabilities.

I will provide a protocol to communicate with the software
on the other computer.

I know it's a crappy solution, but I don't particularly care.

When someone who cares comes along with better public
domain software to drive an SSD or whatever, I'll consider
using that instead. That will depend on how complicated
it is such that I can maintain it. Even then it's more likely
to be an option, as the hard disk interface keeps changing,
and there's no-one volunteering to both live for 1000 years
and maintain it. So at any point I need to go back to serial.

BFN. Paul.
wolfgang kern
2023-04-05 10:01:09 UTC
Permalink
On 05/04/2023 10:09, ***@gmail.com wrote:
[...]
Post by ***@gmail.com
Post by wolfgang kern
none of these devices except modems can be controlled by serial ports.
Not true.
I connect the serial port to wifi using RS232-wifi or whatever
it is called, and that connects to another computer
running Windows or whatever (with my custom software)
which provides the hard disk capabilities.
I will provide a protocol to communicate with the software
on the other computer.
I know it's a crappy solution, but I don't particularly care.
When someone who cares comes along with better public
domain software to drive an SSD or whatever, I'll consider
using that instead. That will depend on how complicated
it is such that I can maintain it.
as an OS-author you should be able to write basic drivers yourself.
I did it for every piece of hardware I ever owned.

All it needs is information about the hardware, I got it direct from
manufacturers, Intel charged me about 40$ per book, I bought all
available books back then [1976... ],
RCA, Motorola, Texas instrument, National Semiconductors and more gave
me all required info books for free with any purchase of chips.

you may find documents for free on the net these days.
RBIL, sandpile.org and more
Post by ***@gmail.com
Even then it's more likely
to be an option, as the hard disk interface keeps changing,
and there's no-one volunteering to both live for 1000 years
and maintain it. So at any point I need to go back to serial.
why obsolete Serial, LPT (also dead) gives you much more options.

you cannot just fiddle an FPGA into any laptop:
* the socket wont match
* and even if: the power pins are somewhere else
* supply voltages are different
* the bus system wont fit neither in size nor impedance
* all the on-chip gates need to be addressed and configured
* how would it boot at all w/o a setup memory controller ?

So you better don't waste your time/money/brain on that.
__
wolfgang
Dan Cross
2023-04-05 13:05:07 UTC
Permalink
Post by ***@gmail.com
[snip]
why obsolete Serial, LPT (also dead) gives you much more options.
* the socket wont match
* and even if: the power pins are somewhere else
* supply voltages are different
* the bus system wont fit neither in size nor impedance
* all the on-chip gates need to be addressed and configured
* how would it boot at all w/o a setup memory controller ?
So you better don't waste your time/money/brain on that.
I think it's pretty obvious to anyone who's even casually
observing now what's going on here. I suggest not wasting any
more time on it; I know I won't.

- Dan C.
muta...@gmail.com
2023-04-05 17:59:46 UTC
Permalink
Post by wolfgang kern
Post by ***@gmail.com
Post by wolfgang kern
none of these devices except modems can be controlled by serial ports.
Not true.
I connect the serial port to wifi using RS232-wifi or whatever
it is called, and that connects to another computer
running Windows or whatever (with my custom software)
which provides the hard disk capabilities.
Actually I don't need Windows - PDOS/386 can do that,
again with the serial port.
Post by wolfgang kern
Post by ***@gmail.com
I will provide a protocol to communicate with the software
on the other computer.
I know it's a crappy solution, but I don't particularly care.
When someone who cares comes along with better public
domain software to drive an SSD or whatever, I'll consider
using that instead. That will depend on how complicated
it is such that I can maintain it.
as an OS-author you should be able to write basic drivers yourself.
Yes, and I probably *could* if I made the effort.

There's lots of things I *could* do if I wanted to.

But I'm trying to maximize result for minimum effort.

And I've been successful (at least in my eyes) at doing that
for decades.

And I don't particularly care who agrees and who disagrees.
Post by wolfgang kern
I did it for every piece of hardware I ever owned.
And I'm not suggesting *you* were wrong for doing that.
Post by wolfgang kern
All it needs is information about the hardware, I got it direct from
manufacturers, Intel charged me about 40$ per book, I bought all
available books back then [1976... ],
RCA, Motorola, Texas instrument, National Semiconductors and more gave
me all required info books for free with any purchase of chips.
Sure. Go for it.
Post by wolfgang kern
you may find documents for free on the net these days.
RBIL, sandpile.org and more
And with the serial port I can get that too. Not just that,
but public domain code.
Post by wolfgang kern
Post by ***@gmail.com
Even then it's more likely
to be an option, as the hard disk interface keeps changing,
and there's no-one volunteering to both live for 1000 years
and maintain it. So at any point I need to go back to serial.
why obsolete Serial, LPT (also dead) gives you much more options.
The option I want is to minimize effort, especially
on drivers, and reuse public domain C90 code.
As already explained in the thread, I'm not after
"any laptop".

I'm after a laptop specifically designed for the FPGA
in question.
Post by wolfgang kern
* the socket wont match
* and even if: the power pins are somewhere else
* supply voltages are different
* the bus system wont fit neither in size nor impedance
* all the on-chip gates need to be addressed and configured
* how would it boot at all w/o a setup memory controller ?
So first can you tell me which of the above will not
be possible to overcome for a *specifically designed
laptop*?
Post by wolfgang kern
So you better don't waste your time/money/brain on that.
I minimize effort on writing drivers specifically so that I
have more time thinking about things like that, and trying
to understand things like that.

BFN. Paul.
wolfgang kern
2023-04-05 21:31:16 UTC
Permalink
On 05/04/2023 19:59, ***@gmail.com wrote:
...
Post by ***@gmail.com
As already explained in the thread, I'm not after
"any laptop".
I'm after a laptop specifically designed for the FPGA
in question.
such just doesn't exist. FPGAs are much too expensive to be used in mass
production and they are slow and power hungry too.
Post by ***@gmail.com
Post by wolfgang kern
* the socket wont match
* and even if: the power pins are somewhere else
* supply voltages are different
* the bus system wont fit neither in size nor impedance
* all the on-chip gates need to be addressed and configured
* how would it boot at all w/o a setup memory controller ?
So first can you tell me which of the above will not
be possible to overcome for a *specifically designed
laptop*?
almost all of the above because no sane manufacturer would waste money
for such a laptop.
I already mentioned it: buy yourself an FPGA evaluation board.
and then show us how you make a UART control a hard-disk :)
__
wolfgang
muta...@gmail.com
2023-04-05 23:11:11 UTC
Permalink
Post by wolfgang kern
Post by ***@gmail.com
As already explained in the thread, I'm not after
"any laptop".
I'm after a laptop specifically designed for the FPGA
in question.
such just doesn't exist. FPGAs are much too expensive to be used in mass
production and they are slow and power hungry too.
We already established earlier in the thread that they
don't exist and noone wants to make them, so you've
now repeated that.

And that's fine. I was simply asking the question. If
the hobbyist (or whatever) market is too small that
no-one wants to pre-make these computers, so be it.

Note that it doesn't necessarily need to be "mass
production". I was just after pre-made.
Post by wolfgang kern
Post by ***@gmail.com
Post by wolfgang kern
* the socket wont match
* and even if: the power pins are somewhere else
* supply voltages are different
* the bus system wont fit neither in size nor impedance
* all the on-chip gates need to be addressed and configured
* how would it boot at all w/o a setup memory controller ?
So first can you tell me which of the above will not
be possible to overcome for a *specifically designed
laptop*?
almost all of the above because no sane manufacturer would waste money
for such a laptop.
I take that as "none of them are applicable, it is indeed
possible to build such a laptop - just no-one has so far,
and I don't see market potential personally".
Post by wolfgang kern
I already mentioned it: buy yourself an FPGA evaluation board.
and then show us how you make a UART control a hard-disk :)
I could demonstrate it in qemu if you think it isn't possible
to get disk sectors via the serial port. There used to be
something called the "$25 network". I didn't use it myself,
but that may have done the same thing. Probably more
robust and feature-filled than I would write.

BFN. Paul.
wolfgang kern
2023-04-06 05:52:20 UTC
Permalink
Post by ***@gmail.com
Post by wolfgang kern
I already mentioned it: buy yourself an FPGA evaluation board.
and then show us how you make a UART control a hard-disk :)
I could demonstrate it in qemu if you think it isn't possible
to get disk sectors via the serial port. ...
enough nonsense heard yet. keep dreaming, I'm out.
__
wolfgang
Dan Cross
2023-04-05 23:29:53 UTC
Permalink
Post by wolfgang kern
Post by ***@gmail.com
So first can you tell me which of the above will not
be possible to overcome for a *specifically designed
laptop*?
almost all of the above because no sane manufacturer would waste money
for such a laptop.
I already mentioned it: buy yourself an FPGA evaluation board.
and then show us how you make a UART control a hard-disk :)
Perhaps we could just stop feeding the troll?

- Dan C.
wolfgang kern
2023-04-06 05:47:40 UTC
Permalink
Post by Dan Cross
Post by wolfgang kern
Post by ***@gmail.com
So first can you tell me which of the above will not
be possible to overcome for a *specifically designed
laptop*?
almost all of the above because no sane manufacturer would waste money
for such a laptop.
I already mentioned it: buy yourself an FPGA evaluation board.
and then show us how you make a UART control a hard-disk :)
Perhaps we could just stop feeding the troll?
agreed :)
__
wolfgang
wolfgang kern
2023-04-04 12:18:25 UTC
Permalink
Post by ***@gmail.com
That *is* the solution to the original problem. A serial
port that can be driven by either MMIO or legacy IO.
then look at UART chips, they have CS-pins (chip-select) and actually
don't care if this is driven by memory or I/O bus address gates.

this chip select signal is composed by AND-gates which are connected to
all of either the DATA- or the I/O-bus lines except a few at the bottom.

This unused lines make up an address range for CS but were also used to
select chip internal registers.
ie MEMIO: A0,A1,A2 address the internal regs while A3...A63 create CS.
ie: I/O : as above for internal registers but use IO3..IO8(16) for CS.

note: some lines to the gates were inverted, so the output represents a
unique address. And there are chips for multiple CS outputs ie: i8205.
__
wolfgang
wolfgang kern
2023-04-04 12:22:05 UTC
Permalink
On 04/04/2023 14:18, wolfgang kern wrote:

corrected
Post by wolfgang kern
Post by ***@gmail.com
That *is* the solution to the original problem. A serial
port that can be driven by either MMIO or legacy IO.
then look at UART chips, they have CS-pins (chip-select) and actually
don't care if this is driven by memory or I/O bus address gates.
this chip select signal is composed by AND-gates which are connected to
all of either the ADDRESS- or the I/O-bus lines except a few at the bottom.
This unused lines make up an address range for CS but were also used to
select chip internal registers.
ie MEMIO: A0,A1,A2 address the internal regs while A3...A63 create CS.
ie: I/O : as above for internal registers but use IO3..IO8(16) for CS.
note: some lines to the gates were inverted, so the output represents a
unique address. And there are chips for multiple CS outputs ie: i8205.
__
wolfgang
Scott Lurndal
2023-04-04 13:45:24 UTC
Permalink
Post by ***@gmail.com
Again - copyright covers a work of art. Not an=20
architectural concept. Patents could cover the later.=20
But 20 years have passed.
You should probably take a law course focusing on intellectual=20
property before assuming that.
I'm not "assuming" anything. It's my understanding.
Which is incorrect. You should take a law course focusing on
intellectual property before understanding that.
muta...@gmail.com
2023-04-05 03:35:45 UTC
Permalink
Post by ***@gmail.com
Again - copyright covers a work of art. Not an=20
architectural concept. Patents could cover the later.=20
But 20 years have passed.
You should probably take a law course focusing on intellectual=20
property before assuming that.
I'm not "assuming" anything. It's my understanding.
Which is incorrect. You should take a law course focusing on
intellectual property before understanding that.
Or I can wait for someone to post a reasonable link
that says that either patents last for more than 20 years,
or copyright applies to hardware concepts.

BFN. Paul.
muta...@gmail.com
2023-04-10 13:44:44 UTC
Permalink
Took a while to get a partial response that was tangible ...
Post by Dan Cross
Post by ***@gmail.com
Post by Dan Cross
Post by ***@gmail.com
Jean-Marc has higher goals, but I'm only trying to get
to a lower goal of getting a C compiler working.
And after that a serial port to access the outside world.
I've written a serial port driver before, for the 8086.
It wasn't a lot of code.
That's only one of many things you'd have to write, and it's
relatively easy by comparison to many of the others.
Could you give me say the 3 most difficult things to
write for the proposed desktop?
Probably initializing the memory and cache controllers, then
DRAM training, and then IO topology initialization. Of course,
all of this is after loading an an initial bootstrap and before
the CPU is even out of reset.
Are you sure this needs to be written? The first thing
you mentioned above was initializing the memory.
Does this code not already do that?

https://opencores.org/websvn/filedetails?repname=plasma&path=%2Fplasma%2Ftrunk%2Ftools%2Fddr_init.c

BFN. Paul.

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